As the leader of AMD’s Adaptive and Embedded Computing Group (AECG), Salil Raje is responsible for all aspects of strategy, business management, engineering, and sales for FPGAs, adaptive SoCs, embedded processors, and core markets.

Raje joined AMD in 2022 from Xilinx, as part of the largest acquisition in semiconductor history. As the executive vice president of the Data Center Group, Raje led a global team of engineering, sales, and marketing professionals dedicated to the data center. During his 17-year tenure with Xilinx, milestone successes included growing a nascent data center business into one of the fastest-growing segments in the company, introducing the Vivado Design Suite that brought ASIC-class algorithms and user interfaces to FPGA designers, and the development and launch of Vitis, which now enables software developers to deploy applications on AMD’s platform more easily.

Before joining Xilinx, Raje was Chief Executive Officer of Hier Design Inc., which he co-founded in 2001. There, he introduced a hierarchical design and design planning tool, PlanAhead, to the FPGA design community. He oversaw Xilinx’s acquisition of Hier Design in 2004. Previously, Raje was a director at Monterey Design Systems, responsible for placement and silicon virtual prototyping technology. He started his career working in High Level Synthesis at IBM T. J. Watson Research Center.

Raje holds a Bachelor of Technology in Electrical Engineering from the Indian Institute of Technology, Madras, and Master of Science and Doctorate degrees in Computer Science from Northwestern University. He holds eight patents in electronic design tools, ASIC, and FPGA designs, and has written more than 15 industry-recognized research papers.